干旱区生态环境知识资源中心(Arid): OASIS: A 28-nm 32-kb SRAM-Based Computing-in-Memory Design With Output Activation Sparsity Support

Arid

DOI	10.1109/TCSII.2023.3339622
	OASIS: A 28-nm 32-kb SRAM-Based Computing-in-Memory Design With Output Activation Sparsity Support
	Guo, Qingyu; Pan, Nanbing; Qiao, Xin; Cui, Xiaoxin; Wang, Yuan
通讯作者	Wang, Y
来源期刊	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
ISSN	1549-7747
EISSN	1558-3791
出版年	2024
卷号	71 期号:4 页码:1899-1903
英文摘要	Computing-in-memory (CIM) has emerged as a promising architecture for energy-efficient edge neural network inference. While CIM designs have shown great potential to benefit from sparsity, there are still limitations in supporting output analog-digital conversion (ADC) sparsity in current designs due to redundant circuits and weight-refreshing overhead. In this brief, we propose a novel CIM design called OASIS (Output Activation SparsIty Support). OASIS employs a single-bit-line computation circuit to support output ADC sparsity, avoiding redundancy or overhead. Our design achieves up to 812.2 TOPS/W normalized energy efficiency at a typical 50% sparsity. We demonstrate its effectiveness by deploying all layers of quantized neural networks to the chip and evaluating them on the MNIST and CIFAR-10 datasets, achieving 99.20% and 84.33% accuracy, respectively.
英文关键词	Neural networks Couplings Common Information Model (computing) Clocks Random access memory MOS devices Logic gates computing-in-memory (CIM) sparsity analog ReLU
类型	Article
语种	英语
收录类别	SCI-E
WOS记录号	WOS:001193325900011
WOS类目	Engineering, Electrical & Electronic
WOS研究方向	Engineering
资源类型	期刊论文
条目标识符	http://119.78.100.177/qdio/handle/2XILL650/404145
推荐引用方式 GB/T 7714	Guo, Qingyu,Pan, Nanbing,Qiao, Xin,et al. OASIS: A 28-nm 32-kb SRAM-Based Computing-in-Memory Design With Output Activation Sparsity Support[J],2024,71(4):1899-1903.
APA	Guo, Qingyu,Pan, Nanbing,Qiao, Xin,Cui, Xiaoxin,&Wang, Yuan.(2024).OASIS: A 28-nm 32-kb SRAM-Based Computing-in-Memory Design With Output Activation Sparsity Support.IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS,71(4),1899-1903.
MLA	Guo, Qingyu,et al."OASIS: A 28-nm 32-kb SRAM-Based Computing-in-Memory Design With Output Activation Sparsity Support".IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS 71.4(2024):1899-1903.