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	Compressible placing of dummy elements in nano-scale VLSI layout
	Holota, Victor
通讯作者	Holota, Victor
会议名称	International Conference on Modern Problems of Radio Engineering, Telecommunication and Computer Science
会议日期	FEB 28-MAR 04, 2006
会议地点	Lviv-Slavsko, UKRAINE
英文摘要	Multilevel discretization on quadtree base for dummy elements placing in nano-scale VLSI layout is proposed. The placing results are covered by simplest data type of GDSII and OASIS standard, which provides the data compression. The resulting placing of dummy elements is dense and uniform that improves the surface plain of dielectric.
英文关键词	nano-scale VLSI topology planarization dummy elements placing GDSII and OASIS data types
来源出版物	TCSET 2006: MODERN PROBLEMS OF RADIO ENGINEERING, TELECOMMUNICATIONS AND COMPUTER SCIENCE, PROCEEDINGS
出版年	2006
页码	568-569
ISBN	978-1-4244-1321-8
出版者	LVIV POLYTECH NATL UNIV
类型	Proceedings Paper
语种	英语
国家	Ukraine
收录类别	CPCI-S
WOS记录号	WOS:000252164700203
WOS类目	Computer Science, Theory & Methods ; Engineering, Electrical & Electronic ; Telecommunications
WOS研究方向	Computer Science ; Engineering ; Telecommunications
资源类型	会议论文
条目标识符	http://119.78.100.177/qdio/handle/2XILL650/296294
作者单位	(1)Precarpathian Natl Univ, UA-76025 Ivano Frankivsk, Ukraine
推荐引用方式 GB/T 7714	Holota, Victor. Compressible placing of dummy elements in nano-scale VLSI layout[C]:LVIV POLYTECH NATL UNIV,2006:568-569.

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